RE: [ethmac] ETHMAC Questions

["Igor Mohor" <igorm@opencores.org>]

> -----Original Message-----
> From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> Behalf Of Peter Wtorek
> Sent: 2. november 2002 7:32
> To: ethmac@opencores.org
> Subject: [ethmac] ETHMAC Questions
>
>
> Hi Igor,
>
> 	Thanks for the response.
>
> 	I have a NIOS Excalibur evaluation board at this time (with an
> APEX20K200E FPGA).  I presume that this is the same evaluation board
> that you used in your hardware verification?  In that case, did you use
> the SRAM provided on the board as the RX/TX buffer RAM?  Or did you
> instead use a module RAM with the SODIMM port provided?
>

No, I have that board but didn't use it so far. I'm sure Jesse Kempa or
Marc Colling will help you. They used it.

> 	Also, with your testing on this board - did you evaluate
> using a SoC
> solution with RISC/MAC/Memory Controller all in the one FPGA?  How did
> you subdivide this particular hardware verification?  Thanks for any
> further help.

Yes. OpenRISC1200, Memory controller, UART 16550, Ethernet, Traffic COP
(interconnect), PCI. Unfortunatelly this solution is propriatery and I
can't share it with you. All cores were tested on "per core" basis and
together using various techiques.

Regards,
	Igor

>
> Regards,
> Peter
>
> >>Hello,
> >>
> >>    I'm interested in using the ETHMAC from opencores.org as an
> Ethernet
> >>MAC on an embedded system without a WB interface.  I then have the
> >>following questions:
> >>
> >>    1. On what hardware platforms has the MAC been tested on?  Based on
> >>some readings, it appears as though it's been verified on an
> XESS Virtex
> >>evaluation board - am I correct on this?
> >
> >
> > Yes. And also on Arm NIOS evaluation board and another
> proprietary board.
> >
> >
> >>    2. Are there reference schematics for the MAC controller interfaced
> >>to a WB device?
> >
> >
> > Not at the moment. Probably I'll add this to the documentation
> but so far
> > no. You can download the core and simulate it or check the
> timings from the
> > WISHBONE spec. Download it here: http://www.opencores.org/wishbone/
> >
> > Best regards,
> > 	Igor
> >
> >
> >>    Thanks for any help.
> >>
> >>Peter
>
>
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