Re: [oc] New 64bit instructions for 32bit processor cores analogy

["Damjan Lampret" <lampret@opencores.org>]

> The Tensilica processor has a variable instruction set from 16 to 32 bits
depending on what it's
> doing.

Tensilica is 32-bit architecture with instruction lengths 16 or 24 bits,
depending what is doing. Yes, 24 bits.

Paul, if you need 32/64-bit RISC, have a look at OpenRISC. For 32 bit
subpart the GNU toolchain is available. 64 bit part still needs GNU
toolchain ported - anyone interested to help?

regards,
Damjan




--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml