CVSROOT: /home/oc/cvs Module name: or1k Changes by: lampret 03/07/11 00:12:07 Modified files: orp/orp_soc/rtl/verilog/or1200: Tag: branch_qmem or1200_top.v Log message: Added three missing wire declarations. No functional changes. -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml