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[cvs-checkins] can/rtl/verilog can_bsp.v can_btl.v can_regist ...

CVSROOT:	/home/oc/cvs
Module name:	can
Changes by:	tadejm	03/07/10 00:59:24

Modified files:
	rtl/verilog    : can_bsp.v can_btl.v can_registers.v can_top.v 

Log message:
	Synchronization fixed. In some strange cases it didn't work according to
	the VHDL reference model.

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