Re: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)

[Billditt@aol.com]

I have used Model Sim VHDL sim.
  It was a good simulator. In fact, Model Sim came out with VHDL
sim first. It wasnt till much later that Verilog sim came out.
They also have a mixed mode (Verilog and VHDL). I havent
used that.
        ditt
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