Re: [usb] USB1.1 Core Address Assignment Failing. Debugging suggestions?

[Evan Jones <ejones@uwaterloo.ca>]

On Sunday, Jul 13, 2003, at 23:12 Canada/Eastern, emailjmja@yahoo.com 
wrote:
> Just a quick thank you. I was having precisely the same problem when
> trying to run the core on an Altera Cyclone device. I only came across
> this discussion today and, sure enough, after playing around with the
> vendor define, the core now works beut.
>
> I'm using Quartus 2.2, and found that the core only works if I enable
> the 'VENDOR_FPGA define.

That's interesting. We are using Quartus 2.1, and it works with either 
"VENDOR_FPGA", or no define at all. I'm not sure if there is a 
difference between the two. Of course, we are using a different device 
(APEX20KE)

We were wondering how much success have you had with the core? At this 
point, we have it working and have successfully used bulk reads and 
writes under Linux and Mac OS X, however under Windows the bulk 
reads/writes seem unreliable. We are not sure if this is because of the 
device, or if the "loopback" test driver we are using from the "Windows 
Device Drivers" book has some problems. Any luck using the OpenCores 
USB part with an Altera FPGA and connecting it to Windows?

Thanks for the feedback!

Evan Jones

--
Evan Jones: http://www.eng.uwaterloo.ca/~ejones/
"Computers are useless. They can only give answers" - Pablo Picasso

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