RE: [oc] Re: Processor Instruction reply for Andreas

["Paul McFeeters" <paul.mcfeeters@ntlworld.com>]

Andreas,

<snip>

> Come on, that isn't the freshest idea.  It's a three operand
> architecture and many RISC machines implement that.  So instead of a
> confusing MOV+ it's actually something like
>
>	ADD	r1,#5,r2
>
> If you aren't familiar with the ARM instruction set I suggest you take a
> look at it.  It implements some funky features like all instructions
> being conditional (not just branches, many branches can in fact be
> omitted), it's three operand and it can shift/rotate one operand in an
> instruction (it doesn't even have a dedicated shift instruction, moves
> with modifiers do just fine).

> I haven't actually worked with ARMs, but this is one of the coolest
> instruction sets I know.

I saw an Archimedes machine once (the first PC to use an ARM processor for
those not familiar with it) does that count? I've never looked at the ARM
instruction set but I'm sure its one of the finest pieces of engineering
to come out of England (from what I've heard). I also met a guy who worked
on the ARM prototypes way back then but that was a pub crawl so don't talk
computers on crawls unless unable to stand up (then people can't understand
a word you say so you're safe) so probably didn't learn anything from that.

Also as Shengyu Shen has found out ARM are very touchy about their
instruction
set so I'd worry that if I studied theirs I could be accused of pinching
ideas
from them.

<snip>

> If you have opcode space to spare it can be a good idea.  I still
> maintain that letting instructions grow excessively to implement
> unflexible combinations is bad.  Your saved CPU cycles will be wasted on
> memory cycles (if you intend to go faster than 60MHz, that is, and don't
> have all your memory as fast and expensive SRAM).

My memory will be SDRAM, don't see the point in spending money on SRAMs.
For development purposes SRAM is fine but all my commercial designs
factor in SDRAM for price/MB (or price/GB now) and end-user expansion.
One DIMM socket on an upcoming design allows any DIMM from a 32Mbyte to a
1Gbyte module to be inserted and a DIMM socket is cheaper than SRAM chips.
Only downside is the gates and I/O pins used to control it but you can't
have something for nothing.

<snip>

Paul

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