pm_at32ap7000.h File Reference


Detailed Description

Power Manager driver.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file pm_at32ap7000.h.

#include "compiler.h"
#include <avr32/io.h>
#include "board.h"
#include "ap7_errno.h"

Go to the source code of this file.

Data Structures

struct  pm_gen_clk_opt_t
 Generic clock genration options. More...
struct  pm_osc_opt_t
 Oscilator startup options. More...
struct  pm_pll_opt_t
 Pll settings. The new frequency will be set according to the following formula: pll = osc * mul / div. More...

Defines

#define PM_CPU_DOMAIN   0
#define PM_CPU_DOMAIN_SIZE   1
#define PM_CPU_PICO   0
#define PM_HSB_DMAC   42
#define PM_HSB_DOMAIN   1
#define PM_HSB_DOMAIN_SIZE   11
#define PM_HSB_HEBI   32
#define PM_HSB_HISI   37
#define PM_HSB_HRAMC   35
#define PM_HSB_HSBBRIDGE   36
#define PM_HSB_LCDC   39
#define PM_HSB_MACB0   40
#define PM_HSB_MACB1   41
#define PM_HSB_PBA   33
#define PM_HSB_PBB   34
#define PM_HSB_USB   38
#define PM_LOCK_ERROR   (-10001)
#define PM_NOT_SUPPORTED   (-10000)
#define PM_OSC_OPT_CLOCK   2
#define PM_OSC_OPT_CRYSTAL   1
#define PM_PBA_DOMAIN   2
#define PM_PBA_DOMAIN_SIZE   17
#define PM_PBA_HPDC   81
#define PM_PBA_PIOA   74
#define PM_PBA_PIOB   75
#define PM_PBA_PIOC   76
#define PM_PBA_PIOD   77
#define PM_PBA_PIOE   78
#define PM_PBA_PIOF   80
#define PM_PBA_SPI0   64
#define PM_PBA_SPI1   65
#define PM_PBA_SSC0   71
#define PM_PBA_SSC1   72
#define PM_PBA_SSC2   73
#define PM_PBA_TWI   66
#define PM_PBA_USART0   67
#define PM_PBA_USART1   68
#define PM_PBA_USART2   69
#define PM_PBA_USART3   70
#define PM_PBB_AUDIOC   106
#define PM_PBB_DAC   104
#define PM_PBB_DOMAIN   3
#define PM_PBB_DOMAIN_SIZE   15
#define PM_PBB_HECC   111
#define PM_PBB_HISI   107
#define PM_PBB_HMATRIX   98
#define PM_PBB_HSDRAMC   110
#define PM_PBB_HSMC   109
#define PM_PBB_INTC   97
#define PM_PBB_MACB0   102
#define PM_PBB_MACB1   103
#define PM_PBB_MMCI   105
#define PM_PBB_PWM   101
#define PM_PBB_SM   96
#define PM_PBB_TIMER0   99
#define PM_PBB_TIMER1   100
#define PM_PBB_USB   108
#define PM_TIMEOUT   100000

Enumerations

enum  pm_calibration_src_e { PM_RC_OSCILLATOR, PM_BOD_CONTROL, PM_BANDGAP_CALIBRATION, PM_VOLTAGE }
 The different sources of the power manager that can be calibrated. More...
enum  pm_clock_source_e {
  PM_OSC0 = 0, PM_OSC1 = 1, PM_OSC32 = 2, PM_PLL0 = 3,
  PM_PLL1 = 4
}
 The different clock sources of the power manager. More...

Functions

int pm_calibrate (int source, unsigned int calibration_value)
 Calibrate the hardware.
int pm_clear_interrupt_status (unsigned int mask)
 Clear raised interrupts from the power manager.
int pm_disable_interrupt (unsigned int mask)
 Disable power manager interrupts.
int pm_disable_module (unsigned int module)
 Disable a module.
int pm_enable_interrupt (unsigned int mask)
 Enable power manager interrupts.
int pm_enable_module (unsigned int module)
 Enable the main clock of a specified module.
int pm_get_bod_settings (unsigned int bod_control, Bool hysteresis, unsigned char level)
 Read Bod settings.
int pm_get_clock_source_freq_hz (int clock_source)
 Gets the frequency in hz for the specified clock source.
unsigned int pm_get_enabled_interrupts (void)
 Read the enable power manager interrupts.
unsigned int pm_get_interrupt_status (void)
 Read the interrupt status of the power manager.
int pm_get_mclk_freq_hz (void)
 Read the current cpu speed.
int pm_get_mclk_source (void)
 Read source of the main clock.
unsigned int pm_get_reset_cause (void)
 Returns cause for the last reset.
int pm_read_clock_domain_scaler (unsigned int clock_domain)
 Read the clock domain scaler.
int pm_read_module_freq_hz (unsigned int module)
 Read the running frequency of a module.
int pm_reset (void)
 Resets the power manager and enables the default startup clock.
int pm_set_bod_settings (unsigned int bod_control, Bool hysteresis, unsigned char level)
 Calibrate and set the BOD.
int pm_set_clock_domain_scaler (unsigned int clock_domain, int divider)
 Set the relative divider for a clock domain.
int pm_set_mclk_source (int clock_source)
 Set the main clock.
int pm_start_generic_clock (unsigned int clock, const pm_gen_clk_opt_t *opt)
 Setup a genclock.
int pm_start_osc (const pm_osc_opt_t *opt)
 Starts a specific oscillator. Used for both internal and external osc.
int pm_start_pll (pm_pll_opt_t *opt)
 Setup and configure a specific pll.
int pm_start_pll_freq (int pll_id, unsigned int freq, Bool wait_for_lock)
 Setup and configure a specific pll to a match target frequency.
int pm_stop_generic_clock (unsigned int clock)
 Stop a generic clock.
int pm_stop_osc (int osc_id)
 Stops a specific oscillator.
int pm_stop_pll (int pll_id)
 Stop a pll.
int pm_wait_for_clock_source_lock (int clock_source)
 Wait actively for a clock source to successfully lock.
int pm_wait_for_status (unsigned int status)
 Wait for status bit(s) to be set.


Define Documentation

#define PM_CPU_DOMAIN   0

#define PM_CPU_DOMAIN_SIZE   1

Definition at line 68 of file pm_at32ap7000.h.

Referenced by pm_disable_module(), and pm_enable_module().

#define PM_CPU_PICO   0

Definition at line 69 of file pm_at32ap7000.h.

#define PM_HSB_DMAC   42

Definition at line 84 of file pm_at32ap7000.h.

#define PM_HSB_DOMAIN   1

#define PM_HSB_DOMAIN_SIZE   11

Definition at line 73 of file pm_at32ap7000.h.

Referenced by pm_disable_module(), and pm_enable_module().

#define PM_HSB_HEBI   32

Definition at line 74 of file pm_at32ap7000.h.

#define PM_HSB_HISI   37

Definition at line 79 of file pm_at32ap7000.h.

#define PM_HSB_HRAMC   35

Definition at line 77 of file pm_at32ap7000.h.

#define PM_HSB_HSBBRIDGE   36

Definition at line 78 of file pm_at32ap7000.h.

#define PM_HSB_LCDC   39

Definition at line 81 of file pm_at32ap7000.h.

#define PM_HSB_MACB0   40

Definition at line 82 of file pm_at32ap7000.h.

#define PM_HSB_MACB1   41

Definition at line 83 of file pm_at32ap7000.h.

#define PM_HSB_PBA   33

Definition at line 75 of file pm_at32ap7000.h.

#define PM_HSB_PBB   34

Definition at line 76 of file pm_at32ap7000.h.

#define PM_HSB_USB   38

Definition at line 80 of file pm_at32ap7000.h.

#define PM_LOCK_ERROR   (-10001)

Definition at line 58 of file pm_at32ap7000.h.

#define PM_NOT_SUPPORTED   (-10000)

#define PM_OSC_OPT_CLOCK   2

Definition at line 62 of file pm_at32ap7000.h.

#define PM_OSC_OPT_CRYSTAL   1

Definition at line 61 of file pm_at32ap7000.h.

#define PM_PBA_DOMAIN   2

#define PM_PBA_DOMAIN_SIZE   17

Definition at line 88 of file pm_at32ap7000.h.

Referenced by pm_disable_module(), and pm_enable_module().

#define PM_PBA_HPDC   81

Definition at line 105 of file pm_at32ap7000.h.

#define PM_PBA_PIOA   74

Definition at line 99 of file pm_at32ap7000.h.

#define PM_PBA_PIOB   75

Definition at line 100 of file pm_at32ap7000.h.

#define PM_PBA_PIOC   76

Definition at line 101 of file pm_at32ap7000.h.

#define PM_PBA_PIOD   77

Definition at line 102 of file pm_at32ap7000.h.

#define PM_PBA_PIOE   78

Definition at line 103 of file pm_at32ap7000.h.

#define PM_PBA_PIOF   80

Definition at line 104 of file pm_at32ap7000.h.

#define PM_PBA_SPI0   64

Definition at line 89 of file pm_at32ap7000.h.

#define PM_PBA_SPI1   65

Definition at line 90 of file pm_at32ap7000.h.

#define PM_PBA_SSC0   71

Definition at line 96 of file pm_at32ap7000.h.

#define PM_PBA_SSC1   72

Definition at line 97 of file pm_at32ap7000.h.

#define PM_PBA_SSC2   73

Definition at line 98 of file pm_at32ap7000.h.

#define PM_PBA_TWI   66

Definition at line 91 of file pm_at32ap7000.h.

#define PM_PBA_USART0   67

Definition at line 92 of file pm_at32ap7000.h.

#define PM_PBA_USART1   68

Definition at line 93 of file pm_at32ap7000.h.

#define PM_PBA_USART2   69

Definition at line 94 of file pm_at32ap7000.h.

#define PM_PBA_USART3   70

Definition at line 95 of file pm_at32ap7000.h.

#define PM_PBB_AUDIOC   106

Definition at line 120 of file pm_at32ap7000.h.

#define PM_PBB_DAC   104

Definition at line 118 of file pm_at32ap7000.h.

#define PM_PBB_DOMAIN   3

#define PM_PBB_DOMAIN_SIZE   15

Definition at line 109 of file pm_at32ap7000.h.

Referenced by pm_disable_module(), and pm_enable_module().

#define PM_PBB_HECC   111

Definition at line 125 of file pm_at32ap7000.h.

#define PM_PBB_HISI   107

Definition at line 121 of file pm_at32ap7000.h.

#define PM_PBB_HMATRIX   98

Definition at line 112 of file pm_at32ap7000.h.

#define PM_PBB_HSDRAMC   110

Definition at line 124 of file pm_at32ap7000.h.

#define PM_PBB_HSMC   109

Definition at line 123 of file pm_at32ap7000.h.

#define PM_PBB_INTC   97

Definition at line 111 of file pm_at32ap7000.h.

#define PM_PBB_MACB0   102

Definition at line 116 of file pm_at32ap7000.h.

#define PM_PBB_MACB1   103

Definition at line 117 of file pm_at32ap7000.h.

#define PM_PBB_MMCI   105

Definition at line 119 of file pm_at32ap7000.h.

#define PM_PBB_PWM   101

Definition at line 115 of file pm_at32ap7000.h.

#define PM_PBB_SM   96

Definition at line 110 of file pm_at32ap7000.h.

#define PM_PBB_TIMER0   99

Definition at line 113 of file pm_at32ap7000.h.

#define PM_PBB_TIMER1   100

Definition at line 114 of file pm_at32ap7000.h.

#define PM_PBB_USB   108

Definition at line 122 of file pm_at32ap7000.h.

#define PM_TIMEOUT   100000

Definition at line 52 of file pm_at32ap7000.h.

Referenced by pm_wait_for_status().


Enumeration Type Documentation

The different sources of the power manager that can be calibrated.

Enumerator:
PM_RC_OSCILLATOR 
PM_BOD_CONTROL 
PM_BANDGAP_CALIBRATION 
PM_VOLTAGE 

Definition at line 190 of file pm_at32ap7000.h.

00190                           {
00191   PM_RC_OSCILLATOR,
00192   PM_BOD_CONTROL,
00193   PM_BANDGAP_CALIBRATION,
00194   PM_VOLTAGE
00195 };

The different clock sources of the power manager.

Enumerator:
PM_OSC0 
PM_OSC1 
PM_OSC32 
PM_PLL0 
PM_PLL1 

Definition at line 132 of file pm_at32ap7000.h.

00132                        {
00133   PM_OSC0=0,
00134   PM_OSC1=1,
00135   PM_OSC32=2,
00136   PM_PLL0=3,
00137   PM_PLL1=4
00138 };


Function Documentation

int pm_calibrate ( int  source,
unsigned int  calibration_value 
)

Calibrate the hardware.

Parameters:
source The source to calibrate
calibration_value Consult the datasheet for your device for vaules.
Returns:
Status.
Return values:
=0 Bandgap successfully calibrated.
<0 Unable to calibrate bandgap.

Definition at line 264 of file pm_at32ap7000.c.

References PM_NOT_SUPPORTED.

00265 {
00266   return PM_NOT_SUPPORTED;
00267 }

int pm_clear_interrupt_status ( unsigned int  mask  ) 

Clear raised interrupts from the power manager.

Parameters:
mask The interrupts to clear.
Returns:
Status.
Return values:
>0 The interrupts which have been cleared.
<0 Unable to clear the desired interrupts.

Definition at line 254 of file pm_at32ap7000.c.

Referenced by pm_wait_for_status().

00255 {
00256   volatile avr32_pm_t *pm = &AVR32_PM;
00257   
00258   pm->icr=mask;
00259 
00260   return ~(pm->isr & mask); 
00261 }

int pm_disable_interrupt ( unsigned int  mask  ) 

Disable power manager interrupts.

Parameters:
mask the interrupts to disable
Returns:
Status.
Return values:
=0 Success. The interrupts set in the mask is disabled
<0 Unable to set the desired mask.

Definition at line 229 of file pm_at32ap7000.c.

00230 {
00231   volatile avr32_pm_t *pm = &AVR32_PM;
00232 
00233   pm->idr = mask;
00234 
00235   return pm->idr;
00236 }

int pm_disable_module ( unsigned int  module  ) 

Disable a module.

Parameters:
module The module to shut down.
Returns:
Status
Return values:
0 Success.
<0 An error occured.

Definition at line 466 of file pm_at32ap7000.c.

References PM_CPU_DOMAIN, PM_CPU_DOMAIN_SIZE, PM_HSB_DOMAIN, PM_HSB_DOMAIN_SIZE, PM_PBA_DOMAIN, PM_PBA_DOMAIN_SIZE, PM_PBB_DOMAIN, and PM_PBB_DOMAIN_SIZE.

00467 {
00468   volatile avr32_pm_t *pm = &AVR32_PM;
00469 
00470   switch (module % 32){
00471     case PM_CPU_DOMAIN:
00472       /* Check whether the module is out of bounds */
00473       if( (module/32) > PM_CPU_DOMAIN_SIZE )
00474         return INVALID_ARGUMENT;
00475       else{
00476         pm->cpumask &= ~( 1<<(module/32) );
00477         break;
00478       }
00479     case PM_HSB_DOMAIN:
00480       /* Check whether the module is out of bounds */
00481       if( (module/32) > PM_HSB_DOMAIN_SIZE )
00482         return INVALID_ARGUMENT;
00483       else{
00484         pm->hsbmask &= ~( 1<<(module/32) );
00485         break;
00486       }
00487     case PM_PBA_DOMAIN:
00488       /* Check whether the module is out of bounds */
00489       if( (module/32) > PM_PBA_DOMAIN_SIZE )
00490         return INVALID_ARGUMENT;
00491       else{
00492         pm->pbamask &= ~( 1<<(module/32) );
00493         break;
00494       }
00495     case PM_PBB_DOMAIN:
00496       /* Check whether the module is out of bounds */
00497       if( (module/32) > PM_PBB_DOMAIN_SIZE )
00498         return INVALID_ARGUMENT;
00499       else{
00500         pm->pbbmask &= ~( 1<<(module/32) );
00501         break;
00502       }
00503     default:
00504       return INVALID_ARGUMENT;
00505   }
00506   return 0;
00507 }

int pm_enable_interrupt ( unsigned int  mask  ) 

Enable power manager interrupts.

Parameters:
mask the interrupts to enable
Returns:
Status.
Return values:
0 Success. The interrupts set in the mask is enabled
<0 Unable to set the desired mask.

Definition at line 219 of file pm_at32ap7000.c.

00220 {
00221   volatile avr32_pm_t *pm = &AVR32_PM;
00222 
00223   pm->ier = mask;
00224 
00225   return pm->ier;
00226 }

int pm_enable_module ( unsigned int  module  ) 

Enable the main clock of a specified module.

Parameters:
module The module to start
Returns:
Status
Return values:
0 Success.
<0 An error occured.

Definition at line 422 of file pm_at32ap7000.c.

References PM_CPU_DOMAIN, PM_CPU_DOMAIN_SIZE, PM_HSB_DOMAIN, PM_HSB_DOMAIN_SIZE, PM_PBA_DOMAIN, PM_PBA_DOMAIN_SIZE, PM_PBB_DOMAIN, and PM_PBB_DOMAIN_SIZE.

00423 {
00424   volatile avr32_pm_t *pm = &AVR32_PM;
00425 
00426   switch (module % 32){
00427     case PM_CPU_DOMAIN:
00428       /* Check whether the module is out of bounds */
00429       if( (module/32) > PM_CPU_DOMAIN_SIZE )
00430         return INVALID_ARGUMENT;
00431       else{
00432         pm->cpumask |= ( 1<<(module/32) );
00433         break;
00434       }
00435     case PM_HSB_DOMAIN:
00436       /* Check whether the module is out of bounds */
00437       if( (module/32) > PM_HSB_DOMAIN_SIZE )
00438         return INVALID_ARGUMENT;
00439       else{
00440         pm->hsbmask |= ( 1<<(module/32) );
00441         break;
00442       }
00443     case PM_PBA_DOMAIN:
00444       /* Check whether the module is out of bounds */
00445       if( (module/32) > PM_PBA_DOMAIN_SIZE )
00446         return INVALID_ARGUMENT;
00447       else{
00448         pm->pbamask |= ( 1<<(module/32) );
00449         break;
00450       }
00451     case PM_PBB_DOMAIN:
00452       /* Check whether the module is out of bounds */
00453       if( (module/32) > PM_PBB_DOMAIN_SIZE )
00454         return INVALID_ARGUMENT;
00455       else{
00456         pm->pbbmask |= ( 1<<(module/32) );
00457         break;
00458       }
00459     default:
00460       return INVALID_ARGUMENT;
00461   }
00462   return 0;
00463 }

int pm_get_bod_settings ( unsigned int  bod_control,
Bool  hysteresis,
unsigned char  level 
)

Read Bod settings.

Returns:
Status.
Return values:
>=0 Success. BOD settings returned.
<0 Error reading BOD.

Definition at line 276 of file pm_at32ap7000.c.

References PM_NOT_SUPPORTED.

00277 {
00278   return PM_NOT_SUPPORTED;
00279 }

int pm_get_clock_source_freq_hz ( int  clock_source  ) 

Gets the frequency in hz for the specified clock source.

Parameters:
clock_source The clock source to use. See pm_clock_source_e
Returns:
Status.
Return values:
>=0 Success. The running frequency is return
<0 Unable to read clock source frequency

Definition at line 169 of file pm_at32ap7000.c.

References PM_OSC0, PM_OSC1, PM_PLL0, and PM_PLL1.

Referenced by pm_get_mclk_freq_hz(), and pm_start_pll().

00170 {
00171   volatile avr32_pm_t *pm = &AVR32_PM;
00172   unsigned int mul, div, osc;
00173 
00174   switch (clock_source) {
00175     case PM_OSC0:
00176       return FOSC0;
00177     case PM_OSC1:
00178       return FOSC1;
00179     case PM_PLL0:
00180       mul = ((pm->pll0 & AVR32_PM_PLL0_PLLMUL_MASK) >> AVR32_PM_PLL0_PLLMUL_OFFSET) + 1;
00181       div = ((pm->pll0 & AVR32_PM_PLL0_PLLDIV_MASK) >> AVR32_PM_PLL0_PLLDIV_OFFSET) + 1;
00182       if((pm->pll0 & AVR32_PM_PLL0_PLLOSC_MASK) >> AVR32_PM_PLL0_PLLOSC_OFFSET) /* Oscillator #1 */
00183         osc = FOSC1;
00184       else
00185         osc = FOSC0;
00186       break;
00187     case PM_PLL1:
00188       mul = ((pm->pll1 & AVR32_PM_PLL1_PLLMUL_MASK) >> AVR32_PM_PLL1_PLLMUL_OFFSET) + 1;
00189       div = ((pm->pll1 & AVR32_PM_PLL1_PLLDIV_MASK) >> AVR32_PM_PLL1_PLLDIV_OFFSET) + 1;
00190       if((pm->pll1 & AVR32_PM_PLL1_PLLOSC_MASK) >> AVR32_PM_PLL1_PLLOSC_OFFSET) /* Oscillator #1 */
00191         osc = FOSC1;
00192       else
00193         osc = FOSC0;
00194       break;
00195     default:
00196       return INVALID_ARGUMENT;
00197   }
00198 
00199   return (mul * osc) / div;
00200 }

unsigned int pm_get_enabled_interrupts ( void   ) 

Read the enable power manager interrupts.

Returns:
Status.
Return values:
The enabled interrupts.

Definition at line 239 of file pm_at32ap7000.c.

00240 {
00241   volatile avr32_pm_t *pm = &AVR32_PM;
00242 
00243   return pm->imr;
00244 }

unsigned int pm_get_interrupt_status ( void   ) 

Read the interrupt status of the power manager.

Returns:
Status.
Return values:
The interrupts which have been trigged

Definition at line 247 of file pm_at32ap7000.c.

Referenced by pm_wait_for_status().

00248 {
00249   volatile avr32_pm_t *pm = &AVR32_PM;
00250   return pm->isr;
00251 }

int pm_get_mclk_freq_hz ( void   ) 

Read the current cpu speed.

Returns:
freq.
Return values:
The current frequency of the main clock

Definition at line 313 of file pm_at32ap7000.c.

References pm_get_clock_source_freq_hz(), pm_get_mclk_source(), PM_OSC0, and PM_PLL0.

Referenced by pm_read_module_freq_hz().

00314 {
00315   unsigned int f_hz;
00316   int source;
00317 
00318   /* Get mclk module source */
00319   source = pm_get_mclk_source();
00320 
00321   /* check wheter oscillator 0 is used */
00322   if( source == PM_OSC0 )
00323     f_hz = FOSC0;
00324   /* check wheter pll 0 is used */
00325   else if ( source == PM_PLL0 )
00326     f_hz = pm_get_clock_source_freq_hz(PM_PLL0);
00327   else
00328     return INVALID_ARGUMENT;
00329 
00330   return f_hz;
00331 }

int pm_get_mclk_source ( void   ) 

Read source of the main clock.

Returns:
source.
Return values:
The source of the main clock. See pm_clock_source_e

Definition at line 297 of file pm_at32ap7000.c.

References PM_OSC0, and PM_PLL0.

Referenced by pm_get_mclk_freq_hz(), and pm_start_pll().

00298 {
00299   unsigned int source;
00300   volatile avr32_pm_t *pm = &AVR32_PM;
00301 
00302   source = pm->mcctrl & AVR32_PM_PLLSEL_MASK;
00303 
00304   if(source==0)
00305     return PM_OSC0;
00306   else if(source==AVR32_PM_PLLSEL_MASK)
00307     return PM_PLL0;
00308   else
00309     return INVALID_ARGUMENT;
00310 }

unsigned int pm_get_reset_cause ( void   ) 

Returns cause for the last reset.

Returns:
Status.
Return values:
>0 The reset cause
=0 Unknown reset cause

Definition at line 78 of file pm_at32ap7000.c.

00079 {
00080   volatile avr32_pm_t *pm = &AVR32_PM;
00081 
00082   return pm->rcause;
00083 }

int pm_read_clock_domain_scaler ( unsigned int  clock_domain  ) 

Read the clock domain scaler.

Parameters:
clock_domain The clock domain in question
Returns:
Status.
Return values:
>0 Success. The divider is returned
<0 An error occured.

int pm_read_module_freq_hz ( unsigned int  module  ) 

Read the running frequency of a module.

Parameters:
module The module to read.
Returns:
Status.
Return values:
>0 Success. The running frequency is returned.
<1 An error occured.

Definition at line 404 of file pm_at32ap7000.c.

References pm_get_mclk_freq_hz(), and pm_read_module_domain_scaler().

00405 {
00406   unsigned int clk, domain;
00407   int divider;
00408 
00409   clk = pm_get_mclk_freq_hz();
00410 
00411   domain = module / 32;
00412   divider = pm_read_module_domain_scaler(domain);
00413   if (divider < 0)
00414     return divider;
00415 
00416   /* CHECK WHETHER THE CLOCK IS MASKED */
00417 
00418   return clk / divider;
00419 }

int pm_reset ( void   ) 

Resets the power manager and enables the default startup clock.

Returns:
Status.
Return values:
0 Reset successful.
<0 Error reseting the power manager.

Definition at line 48 of file pm_at32ap7000.c.

References PM_OSC0, pm_set_mclk_source(), and pm_wait_for_status().

Referenced by local_start_pll0().

00049 {
00050   volatile avr32_pm_t *pm = &AVR32_PM;
00051   unsigned int status = 0;
00052   int disable_module_mask = 0xFFFFffff;
00053 
00054   pm_set_mclk_source(PM_OSC0);
00055 
00056   pm->cksel = 0x00000000;
00057   status |= pm_wait_for_status(AVR32_PM_ISR_CKRDY);
00058 
00059   pm->cpumask = disable_module_mask;
00060   status |= pm_wait_for_status(AVR32_PM_ISR_MSKRDY);
00061 
00062   pm->hsbmask = disable_module_mask;
00063   status |= pm_wait_for_status(AVR32_PM_ISR_MSKRDY);
00064 
00065   pm->pbamask = disable_module_mask;
00066   status |= pm_wait_for_status(AVR32_PM_ISR_MSKRDY);
00067 
00068   pm->pbbmask = disable_module_mask;
00069   status |= pm_wait_for_status(AVR32_PM_ISR_MSKRDY);
00070 
00071   pm->idr = 0x7f; /* disable all interrupts*/
00072   pm->icr = 0x7f; /* clear all interrupts */
00073 
00074   return status;
00075 }

int pm_set_bod_settings ( unsigned int  bod_control,
Bool  hysteresis,
unsigned char  level 
)

Calibrate and set the BOD.

Parameters:
bod_control Specify behaviour upon BOD event
hysteresis Enable/disable hysteresis on the BOD
level Consult the datasheet for your device for vaules.
Returns:
Status.
Return values:
=0 Bandgap successfully calibrated.
<0 Unable to calibrate the BOD.

Definition at line 270 of file pm_at32ap7000.c.

References PM_NOT_SUPPORTED.

00271 {
00272   return PM_NOT_SUPPORTED;
00273 }

int pm_set_clock_domain_scaler ( unsigned int  clock_domain,
int  divider 
)

Set the relative divider for a clock domain.

Parameters:
clock_domain The clock domain to alter
divider The scaler to set. Valid values are 1, 2, 4, 8, 16, 32, 64, 128, 256
Returns:
Status.
Return values:
>=0 Success. The divider is returned
<0 An error occured.

Definition at line 362 of file pm_at32ap7000.c.

References PM_CPU_DOMAIN, PM_HSB_DOMAIN, PM_PBA_DOMAIN, PM_PBB_DOMAIN, and pm_wait_for_status().

Referenced by local_start_pll0().

00363 {
00364   volatile avr32_pm_t *pm = &AVR32_PM;
00365   unsigned int offset;
00366   int divsel;
00367 
00368   // Count trailing zeros
00369   divsel = ctz(divider);
00370 
00371   if ((divsel > 8) || ((1 << divsel) != divider))
00372     return INVALID_ARGUMENT;
00373 
00374   if (divsel > 0)
00375     divsel = (divsel - 1) | AVR32_PM_CKSEL_CPUDIV_MASK;
00376 
00377   // Get offset for bitfields
00378   switch (clock_domain){
00379     case PM_PBB_DOMAIN:
00380       offset = AVR32_PM_CKSEL_PBBSEL_OFFSET;
00381       break;
00382     case PM_PBA_DOMAIN:
00383       offset = AVR32_PM_CKSEL_PBASEL_OFFSET;
00384       break;
00385     case PM_HSB_DOMAIN:
00386       offset = AVR32_PM_CKSEL_HSBSEL_OFFSET;
00387       break;
00388     case PM_CPU_DOMAIN:
00389       offset = AVR32_PM_CKSEL_CPUSEL_OFFSET;
00390       break;
00391     default:
00392       return INVALID_ARGUMENT;
00393   } /* end switch */
00394 
00395   pm->cksel = (pm->cksel & ~((AVR32_PM_CKSEL_CPUDIV_MASK | AVR32_PM_CKSEL_CPUSEL_MASK) << offset))
00396               | (divsel << offset);
00397 
00398   pm_wait_for_status(AVR32_PM_ISR_CKRDY);
00399 
00400   return 0;
00401 } /* End pm_set_clock_domain_scaler() */

int pm_set_mclk_source ( int  clock_source  ) 

Set the main clock.

Parameters:
clock_source The clock to use as the main clock. See pm_clock_source_e
Returns:
Status.
Return values:
0 Success.
<0 An error occured when trying to set the main clock

Definition at line 282 of file pm_at32ap7000.c.

References PM_OSC0, PM_PLL0, and pm_wait_for_clock_source_lock().

Referenced by local_start_pll0(), pm_reset(), and pm_start_pll().

00283 {
00284   volatile avr32_pm_t *pm = &AVR32_PM;
00285 
00286   if ((clock_source == PM_OSC0))
00287     pm->mcctrl = (0 << AVR32_PM_PLLSEL_OFFSET);
00288   else if (clock_source == PM_PLL0)
00289     pm->mcctrl = (1 << AVR32_PM_PLLSEL_OFFSET);
00290   else
00291     return INVALID_ARGUMENT;
00292 
00293   return pm_wait_for_clock_source_lock(clock_source);
00294 }

int pm_start_generic_clock ( unsigned int  clock,
const pm_gen_clk_opt_t opt 
)

Setup a genclock.

Parameters:
clock The generick clock number to setup
opt The settings for the clock
Returns:
Status
Return values:
0 Success.
<0 An error occured.

Definition at line 510 of file pm_at32ap7000.c.

References pm_gen_clk_opt_t::clock_source, pm_gen_clk_opt_t::divider, PM_OSC0, PM_OSC1, PM_PLL0, and PM_PLL1.

Referenced by local_start_pll0().

00511 {
00512   volatile avr32_pm_t *pm = &AVR32_PM;
00513   unsigned int reg = 1 << AVR32_PM_GCCTRL0_CEN_OFFSET;
00514 
00515   if (opt->divider > 1)
00516     reg |= (((opt->divider >> 1) - 1) << AVR32_PM_GCCTRL0_DIV_OFFSET) | (1 << AVR32_PM_GCCTRL0_DIVEN_OFFSET);
00517 
00518   if ( (opt->clock_source == PM_OSC0) || (opt->clock_source == PM_OSC1) )
00519     reg |= opt->clock_source << AVR32_PM_GCCTRL0_OSCSEL_OFFSET;
00520   else if ( (opt->clock_source == PM_PLL0) || (opt->clock_source == PM_PLL1) )
00521     reg |= ((opt->clock_source-3) << AVR32_PM_GCCTRL0_OSCSEL_OFFSET) | (1 << AVR32_PM_GCCTRL0_PLLSEL_OFFSET);
00522   else
00523     return INVALID_ARGUMENT;
00524 
00525   pm->gcctrl[clock] = reg;
00526 
00527   return 0;
00528 }

int pm_start_osc ( const pm_osc_opt_t opt  ) 

Starts a specific oscillator. Used for both internal and external osc.

Parameters:
opt The oscillator options (pm_osc_opt_t)
Returns:
Status.
Return values:
0 Oscillator start successfull.
<0 Error starting the oscillator.

Definition at line 86 of file pm_at32ap7000.c.

References PM_NOT_SUPPORTED.

00087 {
00088   return PM_NOT_SUPPORTED;
00089 }

int pm_start_pll ( pm_pll_opt_t opt  ) 

Setup and configure a specific pll.

Parameters:
opt The pll setting options (pm_pll_opt_t)
Returns:
Status.
Return values:
>=0 Success. Actual pll frequency returned
<0 Not able to set pll according to input.

Definition at line 98 of file pm_at32ap7000.c.

References pm_pll_opt_t::count, pm_pll_opt_t::div, pm_pll_opt_t::mul, pm_pll_opt_t::osc_id, pm_pll_opt_t::pll_id, pm_get_clock_source_freq_hz(), pm_get_mclk_source(), PM_OSC0, PM_PLL0, PM_PLL1, pm_set_mclk_source(), pm_wait_for_clock_source_lock(), and pm_pll_opt_t::wait_for_lock.

Referenced by local_start_pll0().

00099 {
00100   volatile avr32_pm_t *pm = &AVR32_PM;
00101   unsigned int pllreg;
00102   int retval;
00103 
00104   /* Ensure that mclk is not driven by PLL */
00105   if ((opt->pll_id == 0) && (pm_get_mclk_source() == PM_PLL0))
00106     pm_set_mclk_source(PM_OSC0);
00107 
00108   if ((opt->mul == 0) | (opt->div == 0) | (opt->osc_id > 1))
00109     return INVALID_ARGUMENT;
00110 
00111   pllreg = opt->count << AVR32_PM_PLLCOUNT_OFFSET
00112            | (opt->mul - 1) << AVR32_PM_PLLMUL_OFFSET
00113            | (opt->div - 1) << AVR32_PM_PLLDIV_OFFSET
00114            | 4 << AVR32_PM_PLLOPT_OFFSET
00115            | opt->osc_id << AVR32_PM_PLLOSC_OFFSET
00116            | 1 << AVR32_PM_PLLEN_OFFSET;
00117   
00118   if (opt->pll_id == 0)
00119     pm->pll0 = pllreg;
00120   else if (opt->pll_id == 1)
00121     pm->pll1 = pllreg;
00122   else
00123     return INVALID_ARGUMENT;
00124 
00125   if (opt->wait_for_lock) {
00126     retval = pm_wait_for_clock_source_lock(opt->pll_id == 0 ? PM_PLL0 : PM_PLL1);
00127     if (retval != 0)
00128       return retval;
00129   }
00130 
00131   return pm_get_clock_source_freq_hz(opt->pll_id == 0 ? PM_PLL0 : PM_PLL1);
00132 }

int pm_start_pll_freq ( int  pll_id,
unsigned int  freq,
Bool  wait_for_lock 
)

Setup and configure a specific pll to a match target frequency.

Parameters:
pll_id Id number of the pll to set up.
freq The desired frequency
wait_for_lock Assert to poll for lockbit.
Returns:
Status.
Return values:
>=0 Success. Actual pll frequency returned
<0 An error occured when stopping the oscillator.

Definition at line 135 of file pm_at32ap7000.c.

References PM_NOT_SUPPORTED.

00136 {
00137   return PM_NOT_SUPPORTED;
00138 }

int pm_stop_generic_clock ( unsigned int  clock  ) 

Stop a generic clock.

Parameters:
clock The generic clock source to try to stop
Returns:
Status
Return values:
0 Success.
<0 Unable to stop generic clock

Definition at line 531 of file pm_at32ap7000.c.

00532 {
00533   volatile avr32_pm_t *pm = &AVR32_PM;
00534 
00535   pm->gcctrl[clock] &= ~(1 << AVR32_PM_GCCTRL0_CEN_OFFSET);
00536 
00537   return 0;
00538 }

int pm_stop_osc ( int  osc_id  ) 

Stops a specific oscillator.

Parameters:
osc_id ID number of the oscillator that is to be stopped
Returns:
Status.
Return values:
0 Oscillator successfully stopped.
<0 An error occured when stopping the oscillator.

Definition at line 92 of file pm_at32ap7000.c.

References PM_NOT_SUPPORTED.

00093 {
00094   return PM_NOT_SUPPORTED;
00095 }

int pm_stop_pll ( int  pll_id  ) 

Stop a pll.

Parameters:
pll_id Id number of the pll to stop
Returns:
Status.
Return values:
0 Success. The pll is stopped
<0 An error occured when trying to stop pll

Definition at line 141 of file pm_at32ap7000.c.

References PM_NOT_SUPPORTED.

00142 {
00143   return PM_NOT_SUPPORTED;
00144 }

int pm_wait_for_clock_source_lock ( int  clock_source  ) 

Wait actively for a clock source to successfully lock.

Parameters:
clock_source The clock source to wait for. See pm_clock_source_e
Returns:
Status.
Return values:
0 Success.
<0 Unable to lock clock source

Definition at line 147 of file pm_at32ap7000.c.

References PM_OSC0, PM_OSC1, PM_PLL0, PM_PLL1, and pm_wait_for_status().

Referenced by pm_set_mclk_source(), and pm_start_pll().

00148 {
00149   unsigned int status;
00150 
00151   switch (source) {
00152     case PM_OSC0:
00153     case PM_OSC1:
00154       return 0;
00155     case PM_PLL0:
00156       status = 1 << AVR32_PM_ISR_LOCK0;
00157       break;
00158     case PM_PLL1:
00159       status = 1 << AVR32_PM_ISR_LOCK1;
00160       break;
00161     default:
00162       return INVALID_ARGUMENT;
00163   }
00164 
00165   return pm_wait_for_status(status);
00166 }

int pm_wait_for_status ( unsigned int  status  ) 

Wait for status bit(s) to be set.

Parameters:
status Status bit mask to wait for
Returns:
Status.
Return values:
0 Success. The status bit(s) are set
<0 An error occured when waiting for status

Definition at line 203 of file pm_at32ap7000.c.

References pm_clear_interrupt_status(), pm_get_interrupt_status(), and PM_TIMEOUT.

Referenced by pm_reset(), pm_set_clock_domain_scaler(), and pm_wait_for_clock_source_lock().

00204 {
00205   unsigned int timeout = PM_TIMEOUT;
00206 
00207   while ((pm_get_interrupt_status() & status) != status) {
00208     timeout--;
00209     if (timeout==0)
00210       return -1;
00211   }
00212 
00213   pm_clear_interrupt_status(status);
00214 
00215   return 0;
00216 }


Generated on Tue Nov 25 11:16:34 2008 for AVR32 - PM Driver by  doxygen 1.5.6