lcdc_testscreen_example.c File Reference


Detailed Description

LCD controller example for the STK1000.

This example shows how to use the LCD controller. It sets up the LCD controller for the TFT module on the STK1000 and prints a simple test pattern onto it.

Author:
Atmel Corporation= http=//www.atmel.com
Support and FAQ= http=//support.atmel.no/

Definition in file lcdc_testscreen_example.c.

#include "usart.h"
#include "gpio.h"
#include "spi_at32ap7000.h"
#include "lcdc.h"
#include "board.h"
#include "ap7_utils.h"
#include <string.h>
#include "errno.h"
#include "print_funcs.h"
#include "ltv350qv.h"
#include "sdramc_at32ap7000.h"
#include "pm_at32ap7000.h"

Go to the source code of this file.

Functions

int display_bm (lcdc_conf_t *lcdc_conf, void *bm_file)
void fill_frame_buffer (lcdc_conf_t *lcdc_conf)
 Fill the frame buffer with a test picture Writes some colours to the framebuffer. Framebuffer pixel size is packed 24Bit.
void init_spiMaster (volatile avr32_spi_t *spi, long cpuHz)
 initialise SPI in master mode
void lcd_pio_config (void)
 Sets up the pins for the LCD on the STK1000.
void ltv350qv_power_on (volatile avr32_spi_t *spi, unsigned char chip_select)
int main (void)
 LCD test pattern example. Sets up the LCD controller and shows a test pattern on the screen.
void usart_print (volatile avr32_usart_t *usart, char *str)
void usart_printHex (volatile avr32_usart_t *usart, const unsigned long n)
void usdelay (unsigned long usec)

Variables

static lcdc_conf_t ltv350qv_conf
 LCD controller configuration.


Function Documentation

int display_bm ( lcdc_conf_t lcdc_conf,
void *  bm_file 
)

void fill_frame_buffer ( lcdc_conf_t lcdc_conf  ) 

Fill the frame buffer with a test picture Writes some colours to the framebuffer. Framebuffer pixel size is packed 24Bit.

Parameters:
lcdc_conf Pointer to LCD configuration structure

Definition at line 185 of file lcdc_testscreen_example.c.

References lcdc_configuration_s::dmabaddr1, lcdc_configuration_s::xres, and lcdc_configuration_s::yres.

Referenced by main().

00186 {
00187   U32 k,l,x,y;
00188   volatile U8 * framePtr = (U8 *) (lcdc_conf->dmabaddr1 | 0xA0000000);
00189 
00190   for (l=0; l < lcdc_conf->yres; l++){        // line
00191     for (k=0; k < lcdc_conf->xres; k++)    // column
00192     {
00193       x = (255 * l) / lcdc_conf->yres;
00194       y = (255 * k) / lcdc_conf->xres;
00195       *framePtr++ = x;
00196       *framePtr++ = y;
00197       *framePtr++ = 255 - (x + y) / 2;
00198     }
00199   }
00200 }

void init_spiMaster ( volatile avr32_spi_t *  spi,
long  cpuHz 
)

initialise SPI in master mode

Parameters:
spi Pointer to the correct avr32_spi_t struct
cpuHz CPU clock frequency in Hz

Definition at line 208 of file lcdc_testscreen_example.c.

Referenced by main().

00209 {
00210   gpio_map_t spi_piomap = {          \
00211     {AVR32_SPI0_SCK_0_PIN, AVR32_SPI0_SCK_0_FUNCTION},  \
00212     {AVR32_SPI0_MISO_0_PIN, AVR32_SPI0_MISO_0_FUNCTION},  \
00213     {AVR32_SPI0_MOSI_0_PIN, AVR32_SPI0_MOSI_0_FUNCTION},  \
00214     {AVR32_SPI0_NPCS_0_PIN, AVR32_SPI0_NPCS_0_FUNCTION},  \
00215     {AVR32_SPI0_NPCS_1_PIN, AVR32_SPI0_NPCS_1_FUNCTION},  \
00216     {AVR32_SPI0_NPCS_2_PIN, AVR32_SPI0_NPCS_2_FUNCTION},  \
00217     {AVR32_SPI0_NPCS_3_PIN, AVR32_SPI0_NPCS_3_FUNCTION},  \
00218   };
00219   gpio_enable_module(spi_piomap, 7);
00220 
00221   spi_options_t spiOptions = {
00222     .reg = 1,
00223     .baudrate = 1500000,
00224     .bits = 8,
00225     .spck_delay = 0,
00226     .trans_delay = 0,
00227     .stay_act = 1,
00228     .spi_mode = 3,
00229     .modfdis = 0,
00230   };
00231 
00232   /* Initialize as master */
00233   spi_initMaster(spi, &spiOptions);
00234 
00235   /* Set master mode; variable_ps, pcs_decode, delay */
00236   spi_selectionMode(spi, 0, 0, 0);
00237 
00238   /* Select slave chip 1 (SPI_NPCS1) */
00239   spi_selectChip(spi, 1);
00240 
00241   spi_setupChipReg(spi, &spiOptions, cpuHz);
00242 
00243   spi_enable(spi);
00244 }

void lcd_pio_config ( void   ) 

Sets up the pins for the LCD on the STK1000.

Definition at line 142 of file lcdc_testscreen_example.c.

Referenced by main().

00143 {
00144   static const gpio_map_t piomap= {
00145     { AVR32_LCDC_CC_0_0_PIN, AVR32_LCDC_CC_0_0_FUNCTION },
00146     { AVR32_LCDC_DVAL_0_0_PIN, AVR32_LCDC_DVAL_0_0_FUNCTION },
00147     { AVR32_LCDC_HSYNC_0_PIN, AVR32_LCDC_HSYNC_0_FUNCTION },
00148     { AVR32_LCDC_MODE_0_0_PIN, AVR32_LCDC_MODE_0_0_FUNCTION },
00149     { AVR32_LCDC_PCLK_0_PIN, AVR32_LCDC_PCLK_0_FUNCTION },
00150     { AVR32_LCDC_PWR_0_PIN, AVR32_LCDC_PWR_0_FUNCTION },
00151     { AVR32_LCDC_VSYNC_0_PIN, AVR32_LCDC_VSYNC_0_FUNCTION },
00152     { AVR32_LCDC_DATA_0_0_PIN, AVR32_LCDC_DATA_0_0_FUNCTION },
00153     { AVR32_LCDC_DATA_1_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00154     { AVR32_LCDC_DATA_2_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00155     { AVR32_LCDC_DATA_3_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00156     { AVR32_LCDC_DATA_4_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION },
00157     { AVR32_LCDC_DATA_5_PIN, AVR32_LCDC_DATA_5_FUNCTION },
00158     { AVR32_LCDC_DATA_6_PIN, AVR32_LCDC_DATA_6_FUNCTION },
00159     { AVR32_LCDC_DATA_7_PIN, AVR32_LCDC_DATA_7_FUNCTION },
00160     { AVR32_LCDC_DATA_8_0_PIN, AVR32_LCDC_DATA_8_0_FUNCTION },
00161     { AVR32_LCDC_DATA_9_0_PIN, AVR32_LCDC_DATA_9_0_FUNCTION },
00162     { AVR32_LCDC_DATA_10_0_PIN, AVR32_LCDC_DATA_10_0_FUNCTION },
00163     { AVR32_LCDC_DATA_11_0_PIN, AVR32_LCDC_DATA_11_0_FUNCTION },
00164     { AVR32_LCDC_DATA_12_0_PIN, AVR32_LCDC_DATA_12_0_FUNCTION },
00165     { AVR32_LCDC_DATA_13_PIN, AVR32_LCDC_DATA_13_FUNCTION },
00166     { AVR32_LCDC_DATA_14_PIN, AVR32_LCDC_DATA_14_FUNCTION },
00167     { AVR32_LCDC_DATA_15_PIN, AVR32_LCDC_DATA_15_FUNCTION },
00168     { AVR32_LCDC_DATA_16_0_PIN, AVR32_LCDC_DATA_16_0_FUNCTION },
00169     { AVR32_LCDC_DATA_17_0_PIN, AVR32_LCDC_DATA_17_0_FUNCTION },
00170     { AVR32_LCDC_DATA_18_0_PIN, AVR32_LCDC_DATA_18_0_FUNCTION },
00171     { AVR32_LCDC_DATA_19_0_PIN, AVR32_LCDC_DATA_19_0_FUNCTION },
00172     { AVR32_LCDC_DATA_20_0_PIN, AVR32_LCDC_DATA_20_0_FUNCTION },
00173     { AVR32_LCDC_DATA_21_0_PIN, AVR32_LCDC_DATA_21_0_FUNCTION },
00174     { AVR32_LCDC_DATA_22_PIN, AVR32_LCDC_DATA_22_FUNCTION },
00175     { AVR32_LCDC_DATA_23_PIN, AVR32_LCDC_DATA_23_FUNCTION }
00176   };
00177   gpio_enable_module(piomap, 31);
00178 }

void ltv350qv_power_on ( volatile avr32_spi_t *  spi,
unsigned char  chip_select 
)

Referenced by main().

int main ( void   ) 

LCD test pattern example. Sets up the LCD controller and shows a test pattern on the screen.

Definition at line 250 of file lcdc_testscreen_example.c.

References lcdc_configuration_s::dmabaddr1, fill_frame_buffer(), init_spiMaster(), lcd_pio_config(), lcdc_init(), ltv350qv_power_on(), lcdc_configuration_s::pixelsize, lcdc_configuration_s::xres, and lcdc_configuration_s::yres.

00251 {
00252   volatile avr32_spi_t *spi = &AVR32_SPI0;
00253 
00254   // Reset PM. Makes sure we get the expected clocking after a soft reset (e.g.: JTAG reset)
00255   pm_reset();
00256 
00257   // Start PLL0 giving 80 MHz clock
00258   pm_pll_opt_t pll_opt = {
00259     .pll_id = 0,
00260     .mul = 4,
00261     .div = 1,
00262     .osc_id = 0,
00263     .count = 16,
00264     .wait_for_lock = 1,
00265   };
00266   pm_start_pll(&pll_opt);
00267 
00268   // Divide HSB by 2, PBB by 2 and PBA by 4 to keep them below maximum ratings
00269   pm_set_clock_domain_scaler(PM_HSB_DOMAIN, 2);
00270   pm_set_clock_domain_scaler(PM_PBB_DOMAIN, 2);
00271   pm_set_clock_domain_scaler(PM_PBA_DOMAIN, 4);
00272   
00273   pm_set_mclk_source(PM_PLL0);
00274 
00275   init_dbg_rs232(pm_read_module_freq_hz(PM_PBA_USART1));
00276   print_dbg("\nCPU running at ");
00277   print_dbg_ulong(pm_get_mclk_freq_hz()/1000000);
00278   print_dbg(" MHz\n");
00279   sdramc_init(pm_read_module_freq_hz(PM_PBB_HSDRAMC));
00280   print_dbg("Board init complete\n");
00281 
00282   print_dbg("Setting up SPI for LTV350QV panel\n");
00283   init_spiMaster(spi, pm_read_module_freq_hz(PM_PBA_SPI0));
00284   print_dbg("Initializing LTV350QV panel\n");
00285   ltv350qv_power_on(spi, 1);
00286   print_dbg("Setting up LCD controller\n");
00287   lcd_pio_config();
00288 
00289   // Enable CLOCK for LCDC in HSBMASK 
00290   pm_enable_module(PM_HSB_LCDC);
00291 
00292   // Enable generic clock PLL0 for LCD controller pixel clock
00293   pm_gen_clk_opt_t gen_clk_opt = {
00294     .clock_source = PM_PLL0,
00295     .divider = 2,
00296   };
00297   pm_start_generic_clock(7, &gen_clk_opt);
00298 
00299   lcdc_init(&ltv350qv_conf);
00300 
00301   print_dbg("Testing frame buffer\n");
00302 
00303   // clear framebuffer
00304   memset((void *)ltv350qv_conf.dmabaddr1, 0, ltv350qv_conf.xres * ltv350qv_conf.yres * ltv350qv_conf.pixelsize / 8);
00305 
00306   fill_frame_buffer(&ltv350qv_conf);
00307 
00308   while(1);
00309 }

void usart_print ( volatile avr32_usart_t *  usart,
char *  str 
)

void usart_printHex ( volatile avr32_usart_t *  usart,
const unsigned long  n 
)

void usdelay ( unsigned long  usec  ) 


Variable Documentation

LCD controller configuration.

Definition at line 100 of file lcdc_testscreen_example.c.


Generated on Tue Nov 25 11:16:33 2008 for AVR32 - LCDC Driver - Testscreen by  doxygen 1.5.6