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[openrisc] Re: How do I halt the CPU?



Chris,

there is no explicit "halt" instruction. However setting bit PMR[SME] will
put it to sleep (like halt instruction would). You'll notice that in OR1K a
lot of instructions are moved into registers (ie. you have SPRs instead of
registers). Bottom line is that this is just a matter of taste. Ok, now I'm
away from original subject.

If you disabled instructions with SR[EIR], the CPU will wake up when receive
an interrupt. If you want to make it sleep forever (halting CPU forever),
just mask all interrupts in PICMR.

Adding extra bit is ok as long implementation may chose not to implement it
(ok, one bit isn't a lot but many one bits is a lot). Since implementation
could ignore this bit if program sets this in a loop, this would be portable
across implementations that implement this bit or not. If you agree with
optional attrbiute, I'd like to add this bit to the architecture.

regards,
Damjan

----- Original Message -----
From: "Chris Ziomkowski" <chris@asics.ws>
To: <lampret@opencores.org>
Sent: Friday, May 11, 2001 10:10 AM
Subject: How do I halt the CPU?


> Damjan,
>
> In case of a kernel panic and I need to halt the CPU,
> what should I do? There doesn't seem to be a halt
> instruction...I can imagine branching into an infinite
> loop of instructions that set PMR[SME]. This would
> effectively accomplish the same thing I guess.
>
> If I am in in sleep mode, and an interrupt strikes with
> interrupts disabled, will it wake up the CPU or will it
> ignore it?
>
> If it will wake up, is it worth considering an extra bit
> in this register that says "halt forever"? Only a reset
> would bring it out of this state....
>
> Thanks,
>
> Chris
> chris@asics.ws
>
>
>
>
>
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