Re: [fpu] fasu, fpu etc. "C spec"

[Jamil Khatib <jamilkhatib75@yahoo.com>]

Hi all,

--- Damjan Lampret <damjanlampret@yahoo.com> wrote:
> Hi folks,
> 
> I'll synthesize Rudi's FASU for TSMC 0.25u 5LM
> process
> with DC 10/99 and using components from DesignWare
> Basic library. Optimizatied for speed (not area).

OK thats fine
> 
> There was some talk about basic primitives. I think
> if
> we first cover Synopsys (ASIC std cell) users then
> these users will use DesignWare Basic components
> anyway and we don't need to design our own basic
> components (like adders and also probably
> multipliers).
> 
please check the performance and the documentation
about the * operator

> What is the story with 'C' generator for generating
> FPU test vectors? Should I write it or not?

We have to define it.
I'd like to suggest:
1. generate vectors for Verilog and VHDL "I have not
decided yet about the format of VHDL can you help me"
2. we have to enter numbers and show them in readable
format.
3. Random generation of numbers and operations
4. ability to get formelae and compare teh results of
simulation and c code.
5. ability to generate special numbers (inf, NaN ) and
to check for exceptions



Regards
Jamil Khatib


> 
> --damjan
> 
> 
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