RE: [fpu] multiplier

[Jamil Khatib <jamilkhatib75@yahoo.com>]

Hi,

> 
> I did not write the actual multiply function.
> Synopsys Design Compiler does
> a pretty good job with these primitives (just like
> the adder in the FASU),

I saw that you used the * operator but as I remmber
doen not give good performance for this operator "It
has been long time since I used sysnopsys". I think in
order to get good performance you have to use a
multiplier from DesignWare.
If you see that it gives good performance thats OK.

If you think you
> can write a multiplier that will be faster then what
> Design Compiler will
> generate, then go for it !!!  (I wouldn't hold my
> breath thou ... ;*)

I'll try to do that.

> 
> If you want to write a divide block, let me know and
> I won't bother with
> that and let you write it. If you want to write it,
> we need to synch on the
> requirements and specifications.

Anyhow if I am going to write it, it will be in VHDL
if you like we can discuss the design together and you
write teh verilog code and me the vhdl.

Anyhow we need to define the spec of the interfaces

Regards
Jamil Khatib

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