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RE: [ethmac] ethmac project
Hmm.. I'm getting the following error :
# ** Error: (vsim-3033) ../../../../rtl/verilog/eth_spram_256x32.v(151):
Instantiation of 'vs_hdsp_256x32' failed. The design unit was not found.
# Region: /tb_ethernet/eth_top/wishbone/bd_ram
# Searched libraries:
# work
Could this be caused by the same problem ? And if so, how do I turn on
`Ifdef support in Modelsim ?
TIA
Anoop
----- Original Message -----
From: "Igor Mohor" <igorm@o... >
To: <ethmac@o... >
Date: Tue, 1 Oct 2002 15:46:56 +0200
Subject: RE: [ethmac] ethmac project
>
>
> You must have support for 'ifdef switched on.
>
> Regards,
> Igor
>
> > -----Original Message-----
> > From: owner-ethmac@o...
> [mailto:owner-ethmac@o... ]On
> > Behalf Of xande@d...
> > Sent: 1. oktober 2002 12:04
> > To: ethmac@o...
> > Subject: [ethmac] ethmac project
> >
> >
> > Hi. I´m a newbie in this forum.
> > I´m interested in the ethmac project but I don´t succeed in
> the
> > compiling the sources (.v)
> > I´m use the Xilinx but error are generated.
> > Anybody knows can I do to compiling?
> > Somebody has the npl project?
> > I´m using the ethernet.tar.gz that I get in the
> > http://www.opencores.org/projects/ethmac/
> > Thanks.
> >
>
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