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RE: [ethmac] About wishbone module
The generic_tpram module can be found in the "misc" project.
To enable synthesis for Xilinx you should define a macro called
XILINX_RAMB4.
See the generic_tpram.v source for details.
Good Luck,
Moti Litochevski
-----Original Message-----
From: lin.jiajun@mail.zte.com.cn [mailto:lin.jiajun@mail.zte.com.cn]
Sent: Friday, December 21, 2001 5:19 AM
To: ethmac@opencores.org
Subject: [ethmac] About wishbone module
"This 10/100 Mbps Ethernet MAC was implemented in Virtex XCV300-4-
PQ240 FPGA, which is included in XSV board."
But I can't find out the generic_tpram generic synchronous two-port
RAM in the virtex library.
Who can help me?Thanks very much!
Regards!
jiajun lin
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