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[cvs-checkins] can/rtl/verilog can_registers.v can_bsp.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] can/rtl/verilog can_registers.v can_bsp.v
From: OpenCores CVS Agent <cvs@www.opencores.org>
Date: Sat, 21 Jun 2003 11:16:49 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	can
Changes by:	mohor	03/06/21 11:16:48

Modified files:
	rtl/verilog    : can_registers.v can_bsp.v 

Log message:
	paralel_case and full_case compiler directives added to case statements.

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