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[cvs-checkins] ethernet/rtl/verilog eth_wishbone.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] ethernet/rtl/verilog eth_wishbone.v
From: OpenCores CVS Agent <cvs@www.lampret.com>
Date: Fri, 22 Nov 2002 12:26:25 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	ethernet
Changes by:	mohor	02/11/22 12:26:25

Modified files:
	rtl/verilog    : eth_wishbone.v 

Log message:
	Registers RxStatusWrite_rck and RxStatusWriteLatched were not used
	anywhere. Removed.

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