Re: [oc] PCI core - I can't synthesize.

[Damjan Lampret <lampret@opencores.org>]

Hi Jurek,

AFAIK verilog directive undef is not (yet) supported by XST. Try some other synthesis software (you can use Synplify with ISE 4.1 backend).

regards,
Damjan

PS Maybe you'll get more up-to-date information on pci@opencores.org mailing list.

On 20 Mar 2002 14:19 CET you wrote:

> Hi
> I tried to synthesize PCI core in Xilinx ISE 4.1, but it says that:
> 
> "ERROR:Xst:996 - wb_addr_mux.v Line 165. Undefined Text Substitution macro 'undef'
> --> 
> EXEWRAP detected a return code of '6' from program 'C:/ISEFndtn/bin/nt/xst.exe'
> 
> Done: failed with exit code: 0006."
> 
> I'm not oriented in verilog, rather VHDL, I think that "'undef" is directive that ISE doesn't understand
> or I should setup any of synthesize options?
> How to resolve this?
> 
> Best regard
> 
> Jurek

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