[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [oc] C++ to HDLs? Thats fine for breakfast now give me achallenge for lunchtime
<Snip>
>
>> I can see making a C to HDL converter but to actually create a C to EDIF
>netlist will be very challenging.
>
>Challenge? I live for challenges otherwise I wouldn't ever get out of bed.
>Already looked at it briefly, enough to do parsing and decipher the logic
>implied by the C++ code during translation.
>
The problem with generating EDIF is that when I add two numbers together, you will have to output a low level description of an adder. Not impossible or even hard, but its been done before to a fair level of optimisation for different architectures by the synthesis vendors, and may be work you don;t want to replicate (yet....)
Outputing HDL means that the 'boring' part of synthesis is done for you - in fact iverilog does synthesis for Xilinx IIRC, so its an open flow all the way (bar place and route, we'll leave that one for now...)
>> The algorithms used in synthesis tools have many years
>> of work put into them (i.e. they are very complex). Secondly, you would
>> still require a fitter to fit the design into the FPGA/CPLD.
>
>Due to the restricted IP nature of the internal workings of FPGAs you still
>need a manufacturers place and route tool but the netlist shouldn't be a
>"years hard slog task". I estimated the parser for my C++ (yes I am
>going to do OOP in hardware, hey its a challenge) would take a month. Two days
>after starting with a blank CPP file its 99% finished, some challenges might
>look big but when you try to achieve it you realise it was your mental fear
>making the problems seem larger than they actually are. Try to explain vertigo
>to a steeplejack!
>
To do optimal synthesis (or even close) is a long task. To throw together something that works will be much less so.
Couple of further questions...
Are you going to allow floating point to be synthesised?
What about pointers and ram blocks?
function pointers?
Keep up the good work!
Cheers,
Martin
--
Martin Thompson BEng(Hons) CEng MIEE
TRW Conekt
Stratford Road, Solihull, B90 4GW. UK
Tel: +44 (0)121-627-3569 - martin.j.thompson@trw.com
--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml