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Re: [oc] piplelined Radix 16 modular multiplier



To get an account at OpenCores you should send email to
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the name of project you want to start. After you'll get an account you'll
be able to put your files into the CVS and edit your project pages..

regards,
Miha

On Sun, 2 Sep 2001, Umair Farooq Siddiqi wrote:

> Hi 
> 
> I am Undergraduate student of EE. 
> 
> I have designed a piplined radix 16 modular multiplier in VHDL.  
> 
> The deisgn is RISC based with RAM based Look Up Table. I am trying to design a reconfigurable LUT for Xilinx FPGA implementation.  
> 
> I will welcome all responses and anyone help me in putting it here and work with me in improve this design. I donot know the exact procedure for putting designs here but i read in the FAQ that it's for everyone.
> 
> Thanks
> 
> Umair
> 
> 

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