Re: [oc] wishbone bus anad FIFO interface

["Wade D. Peterson" <wadep@silicore.net>]

I could take a stab at a FIFO application note this week.  

Wade

----- Original Message ----- 
From: Jamil Khatib <jamilkhatib75@yahoo.com>
To: <cores@opencores.org>
Sent: Thursday, January 11, 2001 3:55 AM
Subject: [oc] wishbone bus anad FIFO interface


> Does any one has a suggestion on connecting Wishbon
> bus to FIFO buffer?
> 
> I have a proposal of such interface in the HDLC core
> description, do you think it is fine?
> 
> Thanks
> Jamil Khatib
> 
> 
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