head 1.1; branch 1.1.1; access ; symbols noReleaseTag:1.1.1.1 noVendorName:1.1.1; locks ; strict; comment @# @; 1.1 date 2003.02.10.04.05.20; author doru; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2003.02.10.04.05.20; author doru; state Exp; branches ; next ; desc @@ 1.1 log @Initial revision @ text @ Read port 1 Main Page Modules Related Pages

Read port 1
[Register File]

Register File read port 1 connectivity

Requests to RF read port 1

pavr_s3_rfrd1_rq
Most ALU-requiring instructions need to read an operand from RF read port 1 in the same clock as the instruction is decoded (here, "to read" = "to strobe the read input"). Activate the read signal if necessary, via RF read port 1 manager.
pavr_s5_dacu_rfrd1_rq
Note 1: This a somehow `missplaced' RF read port 1 request. To keep the controller compatible with the AVR architecture, loads and stores must operate in the Unified Memory space, that includes Register File, IO File and Data Memory. Thus, it is possible for a LOAD to actually transfer, for example, data from RF to RF, rather than from DM to RF (depending on the addresses involved).
The DACU manager takes the decision which physical device has to be used, and places consequent calls to the appropriate hardware resource manager. This request is such a call.
Note 2: The same situation happens with `misplaced' RF writes in stores. The stores read from RF and can actually write any of RF, IOF or DM.

Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by

1.2.16

@ 1.1.1.1 log @Importing into repository the new directory structure. @ text @@

Read port 1 [Register File]

Read port 1
[Register File]