head 1.1; branch 1.1.1; access; symbols add:1.1.1.1 update:1.1.1.1 initial:1.1.1.1 samiam95124:1.1.1; locks; strict; comment @# @; 1.1 date 2006.10.06.20.08.55; author samiam95124; state Exp; branches 1.1.1.1; next ; commitid 55f24526b7374567; 1.1.1.1 date 2006.10.06.20.08.55; author samiam95124; state Exp; branches; next ; commitid 55f24526b7374567; desc @@ 1.1 log @Initial revision @ text @

Legends

Acronym Brief Description
 *  User Assigned
 (b)  Buried macrocell
 CTC  Control Term Clock
 CTR  Control Term Reset
 CTS  Control Term Set
 CTE  Control Term Output Enable
 DFF  D Flip-Flop
 DDFF  Dual-edge triggered D Flip-Flop
 DEFF  D Flip-Flop with Enable
 DDEFF  Dual-edge triggered D Flip-Flop with Enable
 DG  DataGATE
 DGE  DataGATE Enable
 FB#  Function Block number
 GCK#  Global Clock number
 GTS#  Global Output Enable number
 GSR  Global Set/Reset
 I  Input
 I/O  Input/Output
 IR  Direct Input Register
 KPR  Keeper
 Latch  Transparent latch
 MC#  Macrocell number
 O  Output
 OD  Open Drain
 PU  Pullup
 /S  After any flop/latch type indicates initial state is Set
 TCK  Test clock
 TDI  Test data input
 TDO  Test data output
 TFF  Toggle Flip-Flop
 TDFF  Dual edge triggered Toggle Flip-Flop
 TMS  Test mode select
 VREF  Voltage Reference
@ 1.1.1.1 log @8080 CPU project @ text @@